One of the well-developed techniques for designing large asynchronous circuits is direct mapping, when a specification in some CSP-based language (Balsa, Tangram, etc.) is realised as a circuit, where the constructs of the language (sequencing, parallel composition, etc.) are directly mapped onto some fixed circuit components (sequencer, paralleliser, etc.).
The advantage of this approach is that large circuits can be designed. However, the quality of the resulting circuits (in terms of area and performance) is often poor, since the power of Boolean optimisation (which is universally employed for the design of traditional synchrnous circuits) is not exploited. Hence a technique called control path re-synthesis has emerged, where the control path is extracted from the circuit and re-synthesised. This results in significant reduction in area and latency of the circuit.
There is a number of research groups around the world that work on re-synthesis, and a number of tools have already been developed. Unfortunately, the re-synthesis efforts have been rather poorly coordinated between the groups, with people having little idea of what has already been done by others, in particular what tools have been developed, and what are their capabilities/restrictions/file formats. Because of this, no complete framework for re-synthesis has been implemented so far, in spite of the idea being around for awhile.
The purpose of the RESYN'09 workshop is to bring together researchers from the groups that are interested in the re-synthesis technique, to share experience, demonstrate the existing tools, discuss future plans and collaboration, etc. This should facilitate a joint development of a complete re-synthesis framework, and its deployment for circuit design.
|09:30-09:45||Victor Khomenko||Welcome and introduction|
|09:45-10:15||Doug Edwards||Balsa walk-through|
|10:15-10:30||Luis Tarazona||Current Balsa Optimisations|
The new Teak synthesis system
Using ABS to create new back-ends (using new Teak components as an example)
|11:45-12:15||Dominic Wist||DesiJ: a tool for decomposing STGs|
|12:15-12:45||Josep Carmona||BalsaOpt: a tool for Balsa re-synthesis|
PUNF and MPSAT: tools for analysis and synthesis of STGs
PCOMP: a tool for parallel composition of STGs
|Workcraft: a framework for interpreted graph models|
|16:30-17:00||Discussion time: future plans, collaboration, projects, visits, etc.|
School of Computing Science, Newcastle University, UK
School of Electrical, Electronic and Computer Engineering, Newcastle University, UK