Archive-name: sun-hdwr-ref/part4
Posting-Frequency: as revised
Version: $Id: part4,v 1.10 1995/08/27 19:20:04 jwbirdsa Exp $

		       THE SUN HARDWARE REFERENCE
		     compiled by James W. Birdsall
			(jwbirdsa@picarefy.com)

				PART IV
				=======
			    BOARDS (cont'd)


BOARDS (cont'd)
===============

    Memory boards
    -------------

501-1013        1M Multibus
	One megabyte of zero-wait-state memory with parity, consisting
	of 144 64K x 1-bit chips. Connected to the processor by the
	Multibus P2 connector only; the Multibus P1 connector is used
	only for +5V and ground connections.

	Eight-position DIP switch U506 controls the address at which the
	board appears. The switches are all mutually exclusive. To make
	the board the first megabyte (starting at address 0), turn
	switch 1 ON and all others OFF. To make the board the second
	megabyte (starting at address 0x100000), turn switch 2 ON and
	all others OFF, etc. Via this method, the board may be set for
	any megabyte from the first to the eighth; the eighth is only
	available for memory when a monochrome display board is not
	present in the system.

	Power requirements are +5V @ 3A.

501-1020        2/50 1M VME
	The information on this and related boards is a bit spotty. The
	configurations shown below are only some of the possible
	configurations. Take with a grain of salt.

	J2100
	  Unjumpered always.

	J2200   Base address
	  1M:   3-4 jumpered, all others unjumpered

	J2201   Memory size
		1M @ 64Kx1      1M @ 256Kx1     2M @ 256Kx1     4M @ 256Kx1
		----------      -----------     -----------     -----------
	  1-2       UN              JU              UN              UN
	  3-4       UN              JU              JU              UN
	  5-6       JU              UN              UN              UN
	  7-8       UN              JU              JU              JU
	  9-10      JU              UN              UN              UN
	  11-12     UN              UN              JU              JU
	  13-14     JU              UN              UN              UN
	  15-16     UN              UN              UN              JU

	J2202
	  Not used.

501-1046        2/50 2M VME
	See 501-1020.

501-1047        2/50 4M VME
	See 501-1020. Note that this board cannot coexist with a 4M 2/50
	CPU, since the eighth megabyte is occupied by the monochrome
	framebuffer

501-1048        1M Multibus
	Laid out differently than 501-1013, but functionally the same.
	The address DIP switch is in a different location but is set in
	the same manner. See 501-1013.

501-1067        2/50 3M VME
	See 501-1020.

501-1079        2/50 0M VME
	See 501-1020. This board is intended as a host for the piggyback
	SCSI controller or Sky floating point processor.

501-1102        8M VME 3/2xx
	Eight megabytes of ECC memory consisting of 256K x 1-bit chips,
	with onboard refresh control.

	The first memory board in a Sun 3/2xx must always be in VME slot
	6 and must have a 220/270-ohm terminator pack at location 34-F.
	Up to four boards are supported, with the other three boards
	being in slots 2-4, and not having the terminator pack installed
	at location 34-F.

	The jumper on the upper rear edge of the board (accessible
	through the back panel) determines the memory location of the
	board, in 8M increments. The first board should have the jumper
	set to 0 (at the bottom); additional boards should be set to 1
	through 3 (moving toward the top of the board) in order.

	There are five LEDs on the upper rear edge of the board. In
	normal operation, only the two green LEDs should be lit.

	UE      Uncorrectable error (when lit)          RED

	CE      Correctable error (when lit)            YELLOW

	DIS     CPU access disabled (when lit)          YELLOW

	CPU     CPU accessing memory                    GREEN
	  This LED flickers because it is only lit when the CPU is
	  actually accessing the memory on the board. If the LED is not
	  flickering, that simply means you have more memory than you
	  need at the moment -- the board is not being accessed
	  significantly.

	REF     Refresh OK (when lit)                   GREEN
	  If this LED is not lit, refresh has failed and the board
	  should be repaired or replaced.

501-1131        2M VME 3/1xx
	Two megabytes of memory, similar in construction to the 501-1132
	4M memory board.

	There are two jumpers near one of the VME connectors. The one
	nearest the connector should be jumped, and the other unjumped.

	There are two DIP switches (U3118 and U3119) near the jumpers.
	These set the base address of the board. The switch positions
	are mutually exclusive; within each bank, only one should be ON
	at a time. U3119 is apparently not used for this board.

	U3118
	  1     unknown
	  2     base address 0x200000 (starts at 2M)
	  3     base address 0x400000 (starts at 4M)
	  4     base address 0x600000 (starts at 6M)
	  5-8   unknown

501-1132        4M VME 3/1xx
	Four megabytes of memory, similar in construction to the
	501-1131 2M memory board.

	There are two jumpers near one of the VME connectors. The one
	farther away from the connector should be jumped, and the other
	unjumped.

	There are two DIP switches (U3118 and U3119) near the jumpers.
	These set the base address of the board. The switch positions
	are mutually exclusive; within each bank, only one should be ON
	at a time.

		base address            U3118   U3119
		------------            -----   -----
		0x200000 (2M)             2       3
		0x400000 (4M)             3       4
		0x600000 (6M)             4       5
		0x800000 (8M)             5       6
		0xA00000 (10M)            6       7
		0xC00000 (12M)            7       8

501-1232        4M Multibus
	Four megabytes of memory, with parity, consisting of 144 256K x 1
	chips, 120ns. 14-pin jumper at U1115, may control address. My board
	is the first 4M of RAM and pins 1-2, 3-4, 5-6, and 7-8 are jumped.

    Video boards
    ------------

VIDEO STANDARDS

    MONO

	bwone

		Sun-1 monochrome framebuffer.

	bwtwo

		The standard monochrome framebuffer, found in everything
		from the first Sun-2 to desktop SPARCs, and the 386i as
		well. Standard resolution is 1152 x 900 and high
		resolution is 1280 x 1024; other resolutions (1024 x
		1024?) may exist.

    MG

   MG standards are apparently monochrome framebuffers with analog
outputs connected to grayscale monitors. Still researching this one.

    COLOR

   Note that the ROM monitor in a machine may or may not know about any
particular color framebuffer, depending on the revision of the ROM and
the age of the framebuffer standard. If the ROM does not know how to
detect/display on the particular color framebuffer you have installed,
it will be unable to display the normal ROM boot messages. This does not
affect OS support for the framebuffer; if you are willing to boot blind,
SunOS should find the framebuffer and start displaying on it normally.
The alternative is to get a more recent ROM or a different framebuffer.

	cgone

		Sun-1 color framebuffer. Can run SunWindows. The
		hardware occupies 16K of Multibus address space, by
		default starting at addresses 0xE8000 or 0xEC000 and
		using interrupt level 3.

	cgtwo

		VME-based color framebuffer found in Sun-2's and up. The
		hardware occupies 4M of VMEbus address space, by default
		starting at address 0x400000 and using interrupt level
		4.

	cgthree

		8-bit color framebuffer found in Sun-4's and Sun-386i's.

	cgfour

		8-bit color framebuffer, found in Sun-3's and Sun-4's,
		with a monochrome overlay plane and an overlay enable
		plane on the 3/110 and some 3/60 models. It is the
		onboard framebuffer for the 3/110. The SunOS driver
		implements ioctls to get and put colormaps; the 3/60
		models have an overlay plane colormap as well.

	cgfive

		Can be used alone or with the GP2 accelerator.

	cgsix

		8-bit accelerated (GX) color framebuffer, found in
		Sun-3's and Sun-4's. The GX accelerator is a low-end
		accelerator designed to enhance vector and polygon
		drawing performance.

	cgeight

		24-bit color framebuffer, found in Sun-3's and Sun-4's,
		with a monochrome overlay plane and in some cases an
		overlay enable plane as well. Despite being 24-bit, the
		SunOS driver is documented as implementing ioctls to get
		and put colormaps.

	cgnine

		24-bit double-buffered VME-based color framebuffer, with
		two overlay planes and the ability to work with the GP2
		graphics accelerator board. In double-buffer mode, color
		resolution is reduced to 12 bits.

	cgtwelve

		24-bit double-buffered SBus-based color framebuffer,
		with graphics accelerator, an overlay plane and an
		overlay enable plane. Apparently can run in an 8-bit
		colormapped mode as well. In double-buffer mode, color
		resolution is reduced to 12 bits.

	cgfourteen

		From the manpage: "The cgfourteen device driver controls
		the video SIMM (VSIMM) component of the video and graphics
		subsystem of the SPARCstation 10SX. The VSIMM provides
		24-bit truecolor visuals in a variety of screen
		resolutions and pixel depths."


    ACCELERATORS

	gpone

		Generic name for Graphics Processor (GP), Graphics
		Processor Plus (GP+), and Graphics Processor 2 (GP2)
		boards. The hardware occupies 64K of VMEbus address space,
		starting at address 0x210000 by default and using interrupt
		level 4.

VIDEO BOARDS

    MONO

501-1003        monochrome video/keyboard/mouse TTL only Multibus
	From top to bottom on the rear edge of the board are a female
	DB-9 video connector, a header connector for the serial type 2
	keyboard, and a header connector for the serial Sun-2 mouse.

	This board must be placed in a slot in the Multibus P2
	section shared by the CPU. For backplane P/N 501-1090, it must
	be placed in slot 6 to terminate the P2 bus; for newer
	backplanes, it is usually placed in slot 6 anyway.

	DIP switch and jumper information for revisions -03 through -07:

	U100    DIP switch      video board address
	  Eight-position DIP switch. All switches are mutually exclusive
	  and they correspond to megabyte sections of the address space
	  in the same way as the 501-1013 memory board. The first video
	  board must be set to the eighth megabyte, which means switch
	  eight must be ON and all others must be OFF.

	J1903   jumper          serial interrupt level select
	  pins 13-14 jumped by default, all others unjumped

	J1904   jumper          video interrupt level select
	  pins 9-10 jumped by default, all others unjumped

	Power requirements are +5V @ 4A.

501-1052        monochrome video/keyboard/mouse ECL/TTL Multibus
	From top to bottom on the rear edge of the board are a female
	DB-9 video connector, a header connector for the serial type 2
	keyboard, and a header connector for the serial Sun-2 mouse.

	This board must be placed in a slot in the Multibus P2
	section shared by the CPU. For backplane P/N 501-1090, it must
	be placed in slot 6 to terminate the P2 bus; for newer
	backplanes, it is usually placed in slot 6 anyway.

	Jumper information (note that pin 1 is to the right if you
	hold the board with the printing right-side up -- the same
	orientation as the ICs):

	J1600
	  Bits read on startup to determine size of screen, either
	  standard (1152 x 900) or 1000 x 1000. Pins 9 through 16 are
	  not used and unjumped. Pins 3-4, 5-6, and 7-8 are always
	  jumped. Pins 1-2 are jumped for the standard screen and
	  unjumped for the 1000 x 1000 screen.

	J1801   Crystal Shunt                   JUMPED by default
	  When jumped, the crystal signal is active; when unjumped, the
	  crystal is disabled for A.T.E. testing.

	J1803   video levels
	  To select TTL (very early Sun-2 monitors), jump pins 1-2 and
	  5-6, unjump 3-4 and 7-8. To select TTL/ECL (all monochrome
	  monitors since then, including any that can work with
	  Sun-3's), jump 3-4 and 7-8 and unjump 1-2 and 5-6.

	J1804   Ground test point               UNJUMPED by default
	  Used during troubleshooting only.

	J1903   Serial interrupt level select
		 Located at N3, farther away from the bus connectors.
	  pins 13-14 jumped by default, all others unjumped

	J1904   Video interrupt level select
		 Located at N3, nearer the bus connectors.
	  pins 9-10 jumped by default, all others unjumped

	Power requirements are +5V @ 4A.


    COLOR

501-0289        color video Multibus
	Jumper information:

	J1
	  1-2   VODD                    JUMPED by default
	  3-4   VRESET                  JUMPED by default
	  5-6   SYSCP1                  JUMPED by default
	  7-8   HRESET                  JUMPED by default
	  9-10  STATE 11                JUMPED by default

	J2
	  1-2   M0                      JUMPED by default
	  3-4   M1                      JUMPED by default
	  5-6   M2                      JUMPED by default
	  7-8   M3                      JUMPED by default
	  9-10  M4                      JUMPED by default
	  11-12 M5                      JUMPED by default

	J3              Color board interrupt level
	  pins 5-6 jumped by default, all others unjumped

	J4              Invert BBUS.A0
	  1-2                           JUMPED by default
	  3-4                           UNJUMPED by default

	J5              Ground the P2 bus
	  All pins (1-2, 3-4, 5-6, 7-8, 9-10, 11-12) jumped by default.

	Power requirements are +5V @ 6A and -5V @ 1.2A.

501-1014        Sun-2 color framebuffer VME
	Output resolution 1152 x 900, 66Hz vertical refresh, 62KHz
	horizontal sync. Known to work in 2/160, 3/160, 3/180, 3/260,
	3/280, 3/460, 3/470, 3/480.

501-1058        GB graphics buffer VME
	Used with GP graphics accelerator. Known to work in 2/160,
	3/160, 3/180, 3/260, 3/280, 3/460, 3/480, 4/150, 4/260, 4/280,
	4/330, 4/350, 4/360, 4/370, 4/380.

501-1089        cg3 color framebuffer VME
	Output resolution 1152 x 900, 66Hz vertical refresh, 62KHz
	horizontal sync. Known to work in 3/160, 3/180, 3/260, 3/280,
	3/460, 3/480, 4/150, 4/260, 4/280, 4/330, 4/350, 4/360, 4/370,
	4/380.

501-1116        cg3 color framebuffer VME
	See 501-1089.

501-1267        cg5 color framebuffer VME
	Output resolution 1152 x 900, 66Hz vertical refresh, 62KHz
	horizontal sync. Known to work in 3/160, 3/180, 3/260, 3/280,
	3/460, 3/480, 4/150, 4/260, 4/280, 4/330, 4/350, 4/360, 4/370,
	4/380, 4/470, 4/490.

	If this board is installed with a GP2, then the P2 bus must be
	enabled to communicate with the GP2. Otherwise, the P2 bus must
	be disabled.

501-1319        cg3 color framebuffer VME
	See 501-1089.

501-1434        cg9 color framebuffer VME
	Output resolution 1152 x 900, 66Hz vertical refresh, 62KHz
	horizontal sync. Known to work in 3/160, 3/180, 3/260, 3/280,
	3/460, 3/480, 4/150, 4/260, 4/280, 4/330, 4/350, 4/360, 4/370,
	4/380, 4/470, 4/490.


    ACCELERATORS

501-1055        GP graphics processor VME
	Known to work in 2/160, 3/160, 3/180, 3/260, 3/280, 3/460,
	3/480, 4/150, 4/260, 4/280, 4/330, 4/350, 4/360, 4/370, 4/380.

501-1139        GP+ graphics processor VME
	Known to work in 2/160, 3/160, 3/180, 3/260, 3/280, 3/460,
	3/480, 4/150, 4/260, 4/280, 4/330, 4/350, 4/360, 4/370, 4/380.

501-1268        GP2 graphics processor VME
	Known to work in 3/160, 3/180, 3/260, 3/280, 3/460, 3/480,
	4/150, 4/260, 4/280, 4/330, 4/350, 4/360, 4/370, 4/380, 4/470,
	4/490.

    SCSI controller boards
    ----------------------

501-1006        Sun-2 SCSI/serial Multibus
	SCSI interface and four serial lines with full modem control.
	Identifiable by its three 50-pin header connectors, one of which
	(J3, the bottommost) is the SCSI interface and the other two of
	which (J1 and J2) are the serial lines.

	There are three DIP switches: U305, U312, and U315. Holding the
	board with the 50-pin header connectors down and component side
	toward you, U312 is lowest, U315 in the middle, and U305 at the
	top. All three are eight-position.

	U305    SCSI board base address/bus priority in (BPRN)
	  Switches one through six correspond to address bits A14
	  through A19 respectively. The default setting is switch six
	  on, switches one through five off. Switch eight grounds the
	  bus priority in (BPRN) line and must be OFF; it should be ON
	  only if you are configuring the board as the highest-priority
	  DMA master in a serial card cage (i.e. a non-Sun
	  configuration).

	U312    SCSI interrupt priority
	  Switches eight through one correspond to interrupt priorities
	  0 through 7 in that (reverse) order. The default is for switch
	  six to be ON and all others OFF, which yields an interrupt
	  priority of 2.

	U315    Serial interrupt priority
	  Switches eight through one correspond to interrupt priorities
	  0 through 7 in that (reverse) order. The default is for switch
	  two to be ON and all others OFF, which yields an interrupt
	  priority of 6.

	Serial ports C and D appear on connector J2, E and F on
	connector J1. These are usually labelled SIO-S0 through SIO-S3
	on the back of the machine (SIO-C through SIO-F on older
	machines) and appear as /dev/ttys0 through /dev/ttys3 under
	SunOS. If you have a second SCSI/serial board, the serial ports
	appear as /dev/ttyt0 through /dev/ttyt3 under SunOS. The
	documented maximum output speed is 19200 bps. All ports are
	wired DTE and are compatible with both RS-232C and RS-423, using
	Zilog Z8530A dual UART chips. The pinout of J2 is:

	   3    TxD-C       14  DTR-C       33  DD-D
	   4    DB-C        15  DCD-C       34  CTS-D
	   5    RxD-C       22  DA-C        36  DSR-D
	   7    RTS-C       24  BSY-C       38  GND-D
	   8    DD-C        28  TxD-D       39  DTR-D
	   9    CTS-C       29  DB-D        40  DCD-D
	   11   DSR-C       30  RxD-D       47  DA-D
	   13   GND-C       32  RTS-D       49  BSY-D

	The pinout of J1 is exactly similar; substitute "E" for "C" and
	"F" for "D".

	Power requirements are +5V @ 5A.

501-1045        "Sun-2" SCSI host adapter, 6U VME
	Used with various 6U/9U VME adapters to produce the 501-1138,
	501-1149, and 501-1167. Uses PALs and logic sequencers to
	implement SCSI protocols. Frequently found in Sun-3's despite
	name.

	There are DIP switches at U702 and U704. The bits are inverted,
	so the default settings correspond to an address of 0x200000.

	U702    VMEbus address, low bits
	  1-4   not connected
	  5-8   A12-A15                 ON by default

	U704    VMEbus address, high bits
	  1-5   A16-A20                 ON by default
	  6     A21                     OFF by default
	  7-8   A22-A23                 ON by default

501-1138        "Sun-2" SCSI host adapter, external, VME
	A 501-1045 6U VME SCSI host adapter in a 270-1138 6U/9U VME
	adapter, which provides only an external D50 connection. See
	501-1045. See 3/50 motherboard listing for pinout.

501-1149        "Sun-2" SCSI host adapter, internal, VME
	A 501-1045 6U VME SCSI host adapter in a 270-1059 6U/9U VME
	adapter, which provides only an internal connection to VME slot
	7 in 12-slot chassis. See 501-1045.

501-1167        "Sun-2" SCSI host adapter, external/internal, VME
	A 501-1045 6U VME SCSI host adapter in a 270-1059 6U/9U VME
	adapter, which provides only an internal connection to VME slot
	7 in 12-slot chassis, but also with a 530-1282 cable/connector
	to provide an external D50 connection as well. See 501-1045. In
	order to use both sides of the bus, it is generally necessary to
	remove the SCSI terminators from the 501-1045 board. See 3/50
	motherboard listing for external pinout. Has a holder for a
	coin battery which drives a clock chip that Suns don't use (see
	Misc Q&A #6).

501-1170        "Sun-3" SCSI host adapter, internal, VME
	A 501-1236 6U VME SCSI host adapter in a 270-1059 6U/9U VME
	adapter, which provides only an internal connection to VME slot
	7 in 12-slot chassis.

501-1217        "Sun-3" SCSI host adapter, external, VME
	A 501-1236 6U VME SCSI host adapter in a 270-1138 6U/9U VME
	adapter, which provides only an external D50 connection. See
	501-1236. See 3/50 motherboard listing for pinout.

501-1236        "Sun-3" SCSI host adapter, 6U VME
	Used with various 6U/9U VME adapters to produce the 501-1170 and
	501-1217. Can also be used with a 270-1059 6U/9U VME adapter (as
	in the 501-1170) paired with a 530-1282 cable/connector to
	provide an external D50 connection as well (generally requires
	removing the SCSI terminators from the 501-1236 to use both
	sides of the bus); this configuration was never supported by
	Sun, so it doesn't have a part number, but is supposed to work.
	Uses an NCR5380 SCSI chip.

	There are DIP switches at U408 and U409.

	SW1     VMEbus address
	    At U409.
	  1-2                           ON by default
	  3                             OFF by default
	  4-8                           ON by default

	SW2     VMEbus address
	    At U408.
	  1                             ON by default
	  2     ON for first host adapter, OFF for second
	  3-5                           ON by default
	  6-8   not connected


    Non-SCSI disk controller boards
    -------------------------------

SMD

370-1012        Xylogics 450 SMD controller Multibus
	This board is used to control SMD hard disks. It is a Multibus
	bus master using variable-burst-length DMA.

	This board should not share a Multibus P2 section with Sun-2 CPU
	or memory boards because it has P2 traces which are incompatible
	with those used on the Sun-2 CPU and memory boards.

	Since this board is a Multibus bus master, its relative slot
	number determines its priority (slot 1 is the highest). The
	board must be placed in a lower-priority position than the Sun-2
	CPU board for proper handling of bus arbitration. It should also
	be placed in a lower-priority position than the 370-0502 (?)
	TAPEMASTER half-inch tape controller board, if there is one in
	the system, but it may be placed in a higher-priority position
	than the 501-1006 SCSI/serial board.

	This board dissipates a fair amount of heat and should be placed
	in the most central position possible, subject to the
	considerations listed above. For maximum air circulation, leave
	the slot to the left of this board empty, if possible.

	The edge of the board has one 60-pin header connector for SMD
	control and four 26-pin header connectors for SMD data; however,
	only two SMD disks are supported per board by SunOS. There is no
	required order of connection from SMD disks to SMD data
	connectors; the board automatically detects which disk is
	connected to which data connector.

	At one corner of the SMD-connector-edge of the board is a small
	LED, which flickers during disk activity.

	This board has dozens of jumper blocks, some of which are
	cross-jumped to other jumper blocks.

	JA-JB   crossjumped always from one to the other
		 Located at K3.
	  1-1   8/16-bit address control                UNJUMPED by default
	  2-2   address bit 16                          UNJUMPED by default
	  3-3   address bit 8                           JUMPED by default
	  4-4   address bit 15                          UNJUMPED by default
	  5-5   address bit 9                           UNJUMPED by default
	  6-6   address bit 14                          UNJUMPED by default
	  7-7   address bit 10                          UNJUMPED by default
	  8-8   address bit 12                          JUMPED by default
	  9-9   address bit 11                          UNJUMPED by default
		 These address bits are inverted; the pattern above
		 (0x11) actually yields address 0xEE??.
	  10-10 ground                                  UNJUMPED by default

	JE
		 Located at K4, more or less.
	  1-2   parallel DMA arbiter/BPRO               JUMPED by default
	  3     isolate parallel DMA                    -
	  4-5   address bit 7                           JUMPED by default
		 This address bit is also inverted.

	JF
	  1-JH1 bus activity LED                        CROSSJUMPED by default
		 Does not appear on my Rev. M board, JH1 is wired
		 directly to pin 1 on E6 (a 74LS273) instead.

	JH
		 Located at N10, right by P2 bus connector.
	  1                                     CROSSJUMPED to JF1 by default
		 See JF1.
	  2     power fail protection                   -
	  3-4   inhibits DMA sequencer CLK              UNJUMPED by default
	  5-6   selects DMA sequencer CLK               JUMPED by default

	JJ
		 Located at J12.
	  1-2   inhibit disk sequencer CLK              JUMPED by default
	  3-4                                           UNJUMPED by default

	JK
		 Located at N11.
	  Eight-pin jumper block, all unjumped by default.
		 On my Rev. M board, pins 1-2, 3-4, and 5-6 are
		 jumped.

	JM
		 Located at N13, very lower right corner by P2 bus
		 connector.
	  1-2   16-24 bit mode                          UNJUMPED by default
	  3-4   16-20 bit mode                          JUMPED by default
	  5-6
		 Not listed in docs, appear on my Rev. M board,
		 unjumped.

	JN
		 Can't find on my Rev. M board.
	  1-2                                           UNJUMPED by default

	JT
		 Located at K1-K2ish.
	  1-2   optional 8K                             JUMPED by default
	  3                                             -

	JV
		 Located at B3.
	  1-2   optional 8K                             JUMPED by default
	  3                                             -

	JX      interrupt request level
		 Located at N4.
	  1-2                                           UNJUMPED by default
	  3                                             -
	  4-E2  interrupt level 2                       JUMPED by default
		  NOTE that this is NOT jumper pin JE2 but rather
		  another pin labeled just "E2".
	  5-6                                           UNJUMPED by default
	  7-8                                           UNJUMPED by default

	JY
		 Located at G9ish.
	  1-2   close ECC feedback                      JUMPED by default
	  3                                             -

	JZ      crystal shunt
		 Located in upper right corner by thumblever.
	  Jumped by default.

	For the first XY450 board, jump JC1-JR1, JC2-JD2, JC3-JD3, and
	JC4-JD4. For the second XY450 board (only two are supported by
	SunOS), jump JC1-JR1, JC2-JD2, JC3-JD3, and JC4-JR4. Pins one
	through four of JC correspond to address bits six through three
	in that (reverse) order. Jumping JC to JR selects the bit;
	jumping JC to JD deselects the bit. Hence, the address of the
	first board is 0xEE40 and the second 0xEE48. These jumper blocks
	are located at K4, right by the JE block.

	Power requirements are +5V @ 8A and -5V @ 1A.
	
IPI

501-1855        ISP-80 IPI controller VME
	This board allows connection of IPI drives (q.v. for information
	on IPI in general) to a VME-based machine. It has an onboard
	68020 and RAM for handling I/O optimization and buffering. It
	has a maximum DMA tranfer rate of 16M per second, but the IPI
	maximum disk tranfer rate is only 6M.

	Note that older firmware revisions may have problems with newer
	disks.

SCSI ADAPTORS

370-1010        Adaptec ACB4000 SCSI-MFM controller
	This board allows an MFM hard disk with a standard ST-506
	interface to be connected to a SCSI bus. The Adaptec ACB4070A
	SCSI-RLL controller is almost identical.

	This board supports up to two MFM drives, which appear as SCSI
	LUNs 0 and 1 within the SCSI ID for the board as a whole.

	Connection information:

	J0      20-pin                  MFM data connector for drive 0

	J1      20-pin                  MFM data connector for drive 1

	J2      34-pin                  disk control connector

	J3                              power

	J4      50-pin                  SCSI connector

	Jumper information:

	JS,JR,JT,JPU
	  R-S   select precomp at cylinder 400          UNJUMPED by default
	  R-T   select precomp on all cylinders         UNJUMPED by default
	  R-PU  deselects precomp on all cylinders      JUMPED by default

	J5
	  A-B   SCSI id MSB
	  C-D   SCSI id
	  E-F   SCSI id LSB
		  Pins A-F are used to set the SCSI bus address. Jumping
		  a pair of pins turns that bit on; unjumping them turns
		  that bit off. The default SCSI bus address is 0, all
		  pins unjumped.
	  G-H   DMA transfer rate                       UNJUMPED by default
		  SYSCLOCK/4 when jumped, DATACLOCK/2 when unjumped.
	  I-J   Extended commands enable/disable        UNJUMPED by default
	  K-L   not used                                UNJUMPED by default
	  M-N   selects a seek complete status          UNJUMPED by default
		  Also described as "Support Syquest 312/DMA 360".
	  O-P   Self-diag                               UNJUMPED by default

	SCSI terminator packs at RP3 and RP4, sometimes (usually?)
	soldered in.

	Error Codes (number of half-second bursts):

	    None            8085
	    1               8156 RAM
	    2               Firmware
	    3               AIC-010 logic
	    4               AIC-010 logic
	    5               AIC-300 logic
	    6               AIC-010 BUS

	Power requirements are +5V @ 2A (1.5A?) and +12V @ 0.5A (0.3A?).

xxx-xxxx        Emulex MD21 SCSI-ESDI controller
	This board allows an ESDI disk to be connected to a SCSI bus.
	The MD21 can actually control two ESDI disks, which appear as
	SCSI logical units (LUNs) 0 and 1 on the SCSI ID assigned to the
	MD21 as a whole.

	The MD21 uses a 8031 CPU with 32K PROM. It has 32K of onboard
	buffer RAM, with about 14K being used for each connected disk.
	It supports ESDI transfer rates up to 15Mbps and SCSI transfer
	rates up to 1.25Mbps (burst). It supports the SCSI
	connect/disconnect option and SCSI bus parity. Manufacturer's
	rated Mean Time Between Failures is 42,425 hours.

	This board has one eight-position DIP switch and seven
	connectors.

	SW1
	  1-3   SCSI bus ID, LSB (SW1-1) to MSB (SW1-3)
	  4     not used
	  5     physical sector size
		  ON    256 bytes
		  OFF   512 bytes
	  6     automatic drive spinup
		  ON    drives not spun up automatically
		  OFF   drives spun up automatically
	  7     soft error reporting
		  ON    errors not reported
		  OFF   errors reported
	  8     SCSI bus parity
		  ON    enabled
		  OFF   disabled

	J1      ESDI control (daisy-chained to both disks)
		  maximum cable length 10 feet

	J2      ESDI data for drive 1
		  maximum cable length 10 feet

	J3      ESDI data for drive 0
		  maximum cable length 10 feet

	J4      user panel connector

	J5      testing

	J6      SCSI bus

	J7      power

	This board can be configured to provide power to an external
	terminator by installing a 1N5817 diode at board location CR2
	and connecting wire wrap jumper E to F. This will provide
	termination power on SCSI bus pin 26. WARNING: this can cause
	shorts!

	This board has two status LEDs, one red and one green.

		RED     GREEN
		---     -----
		OFF     OFF     hardware reset test
		OFF     ON      8031 test
				PROM checksum test
				buffer controller test
				dynamic RAM test
		ON      OFF     disk formatter test
				SCSI controller test
		ON      ON      self-test passed, ready to run

	During normal operations, the green LED seems to blink steadily.

	Power requirements are +5V @ 1.5A.


    Non-SCSI tape controller boards
    -------------------------------

HALF-INCH NINE-TRACK

370-0502 ?      Computer Products Corporation TAPEMASTER
	This part number is listed as either the TAPEMASTER or the
	Xylogics 472 tape controller in different places. The TAPEMASTER
	is also listed as 370-0167.

	This board should not share a Multibus P2 section with Sun-2 CPU
	or memory boards.

	This board is a Multibus bus master, so its relative slot
	number determines its priority (slot 1 is the highest). The
	board must be placed in a lower-priority position than the Sun-2
	CPU board for proper handling of bus arbitration. It should also
	be placed in a higher-priority position than the 370-1012
	Xylogics 450 SMD controller board, if there is one in the
	system.

	DIP switch and jumper information:

	S1      addressing
	  Eight-position DIP switch, selecting address bits A1 through
	  A7 and 8/16-bit addressing. The first TAPEMASTER board should
	  have switches 1 and 3 OFF and all others ON. The second
	  TAPEMASTER board should have switches 1, 3, and 7 OFF and all
	  others ON.

	S2      addressing
	  Eight-position DIP switch, selecting address bits A8 through
	  A15. All switches should be ON.

	jumper pins (defaults in uppercase):
	  1-2   UNJUMPED for Sun-2 backplanes, jumped for serial
		backplane (Sun-1/100U)

	  3-4   JUMPED if the CPU is set up to support CBRQ, unjumped if
		not

	  3-5   jumped if the CPU is not set up to support CBRQ,
		UNJUMPED if it is

			JUMPED BY DEFAULT
	  INT-3         28-29           35-39           43-49           48-49
	  15-16         31-39           36-40           44-49           42-50
	  18-19         32-39           37-39           45-49           51-52
	  20-21         33-39           38-39           46-49           54-55
	  25-26         34-39           41-49           47-49           57-58

			UNJUMPED BY DEFAULT
	  22      27      30      53      56      59-60

	Power requirements are +5V @ 4A.


SCSI ADAPTORS

370-1011        Sysgen SC4000 SCSI/QIC-II controller
	This board is used to connect a QIC-II (aka QIC-02) quarter-inch
	cartridge tape drive to the SCSI bus. The board supports only
	one attached tape drive, usually a QIC-11 (20M) drive. It was
	standard equipment on the 2/120.

	There are two LEDs (DS1 and DS2) in one corner of the board. DS2
	is on when the board is selected (during SCSI activity).

	Connection information:

	JH      50-pin                  SCSI connector

	JT      50-pin                  tape connector, labelled "TAPE"

	Note that there is a 50-pin SCSI connector labelled "SLAVE" on
	the board as well. The Sysgen manual recommends connecting
	downstream SCSI devices to this connector instead of using an
	inline connector on JH; Sun recommends against this, because
	doing so will result in loss of access to all downstream devices
	if the Sysgen board fails.

	DIP switch and jumper information:

	four-position DIP switch        SCSI address
	  Switches one, two, and three correspond to SCSI address bits
	  one, two, and three respectively. The default is SCSI address
	  4: switches one and two OFF, switch three ON. Switch four
	  should always be OFF.

	PK6     DIP sockets             SCSI termination
	PK7
	  220/330-ohm terminator packs

	W1      jumper
	  Eight pins, all unjumped by default.

	Power requirements are +5V @ 2A.

xxx-xxxx        Emulex MT-02 SCSI/QIC-02?(-36?) controller
	This board is used to connect a quarter-inch cartridge tape
	drive to the SCSI bus. It is the standard method of connecting a
	QIC-24 (60M) drive to a Sun-3. Despite the name, the board is
	reputed to actually attach QIC-36 (not QIC-02) devices to the
	SCSI bus. So far I haven't found any documents which actually
	say one way or the other.

	With the component side of the board up and the power connector
	J4 in the upper right corner, the tape data connector J3 is on
	the left side, the SCSI connector J5 is on the right side, and
	the eight-position DIP switch SW1 is in the upper left corner.

	SW1     eight-position DIP switch
	 SW1-1  SCSI id LSB
	 SW1-2  SCSI id
	 SW1-3  SCSI id MSB
	 SW1-4  unused                  OFF by default
	 SW1-5  drive select 0          see table below
	 SW1-6  drive select 1
	 SW1-7  drive select 2          documented as OFF by default
	 SW1-8  SCSI bus parity         OFF by default
		  ON    enable
		  OFF   disable

	There are two jumpers, A-B and E-F.

	A-B     EPROM memory size select        JUMPED by default
	  In the upper-leftish center.

	E-F     JUMPED for Archive Scorpion
		UNJUMPED for Wangtek 5000E
	  Just inboard from the center of the tape data connector J3.

	SCSI terminator packs are at U5 and U46. U5 is in the upper
	right corner; U45 is in the lower right corner.

	Drive type settings are:

		SW1-7  SW1-6  SW1-5      Drive

		  0      0      0        Cipher QIC-36
		  0      0      1       *Archive Scorpion
		  0      1      0        Wangtek series 5000 basic
		  0      1      1       *Wangtek series 5000E
		  1      0      0        Kennedy 6500
		  1      0      1        ???
		  1      1      0        ???
		  1      1      1        ???

	   *Documented by Sun.


    Ethernet and other network boards
    ---------------------------------

501-0288        3COM 3C400 Ethernet Multibus
	This board is used in Sun-1 and Sun-2 configurations. It may be
	distinguished from the 501-1004 Sun-2 Multibus Ethernet by
	checking the location of the Ethernet cable connector, which is
	toward the bottom of the board. (On the edge with the Multibus
	connectors, the larger connector is toward the top.)

	DIP switch and jumper information:

	JP1     jumper          Addressing size
	JP2     jumper
	  With the board component-side up and the Multibus edge
	  connectors facing you, these jumpers are in the lower left
	  corner of the board. They should be set for 20-bit memory
	  addressing, with JP1 unjumped and JP2 jumped.

	MRDC    jumper
	MWTC    jumper
	IORC    jumper
	IOWC    jumper
	  To the right of JP1 and JP2. MRDC and MWTC should be jumped.
	  IORC and IOWC should be unjumped.

	INT?    jumper          Ethernet interrupt level
	  Eight-position jumper, with pairs marked INT0 through INT7.
	  INT3 should be jumped, all others unjumped.

	ADR17   DIP switch
	  In the bottom right corner of the board. All switches should
	  be set to OFF.

	ADR13   DIP switch
	  Eight-position DIP switch; switches seven through one
	  correspond to address bits A13 through A19 in that (reverse)
	  order. For the first Ethernet board, switches one, two, and
	  three should be ON and all others OFF. For the second Ethernet
	  board, switches one, two, three, and seven should be ON and
	  all others OFF. Switch eight should ALWAYS be OFF.

	The Ethernet address PROM is in component position I2.

	Power requirements are +5V @ 5V and +12V @ 0.5A.

501-1004        Sun-2 Ethernet Multibus
	This board may be distinguished from the 501-0288 3COM Multibus
	Ethernet by checking the location of the Ethernet cable
	connector, which is toward the top of the board (toward the same
	short edge as the larger Multibus connector). The connector is a
	header connector; electrically, it is AUI Ethernet.

	Intel 82586 Ethernet controller chip, 256K of dual-ported
	memory.

	DIP switch and jumper information:

	U503    DIP switch      Register base address
	  Eight-position DIP switch; switches one through eight
	  correspond to address bits A12 through A19, respectively. For
	  the first Ethernet board, switches four and eight should be ON
	  and all others OFF. For the second Ethernet board, switches
	  three, four, and eight should be ON and all others OFF.

	U505    DIP switch      On-board memory base address
	  Eight-position DIP switch; switches one through four
	  correspond to address bits A16 through A19, respectively. For
	  the first Ethernet board, switch three should be ON and all
	  others OFF. For the second Ethernet board, switches two and
	  four should be ON and all others OFF.

	U506    DIP switch      Size of Multibus port into onboard memory
	  Eight-position DIP switch. For the first Ethernet board,
	  switches two, three, six, and seven should be ON and all
	  others OFF. For the second Ethernet board, switches one, four,
	  five, and eight should be ON and all others OFF.

	J101    jumper          Transceiver type
	  For type 1 (capacitive-coupled) transceivers, jumped. For type
	  2 (transformer-coupled) transceivers, unjumped. On my Rev. 12A
	  board, just a pair of solder pads, no wire -- permanently
	  unjumped.

	J400    jumper          M.BIG
	  "J400 allows the selection of M.BIG, or the input to Port B
	  (bank select circuitry) which has the address lines for 256K
	  DRAMs." Unjumped by default.

	J401    jumper          M.EXP
	  Multibus P2 address and data buffers enabled when jumped,
	  disabled when unjumped. If enabled, this board MUST have its
	  own private P2 section. ONLY boards which do not use the P2
	  bus at all may be one the same section. If disabled, this
	  board may be on the same P2 section as the CPU and memory
	  boards, or it may be on a P2 section used by other boards with
	  these notes: this board grounds pins P2-26, P2-32, P2-38, and
	  P2-50, and cannot tolerate voltages outside the range of 0-5V
	  on any other P2 pins. Sun-supplied boards meet these
	  requirements.

	J500    hardwired jumper        Ethernet interrupt level
	  Sets the Ethernet interrupt level. Pins 7-8 are hardwired
	  together, setting the interrupt level to 3. Level 7 is closest
	  to the edge of the board, level 0 closest to the center.

	Power requirements are +5V @ 6A and +12V @ 0.5A.


    Communications boards
    ---------------------

501-1006        Sun-2 SCSI/serial Multibus
	See under "SCSI boards".

xxx-xxxx        Systech MTI-800A/1600A Multiple Terminal Interface Multibus
	There are two parts to the MTI-800A/1600A: a Multibus controller
	board and a 19" rack-mountable chassis with eight (800A) or
	sixteen (1600A) serial ports. The board should not share a
	Multibus P2 section with Sun-2 CPU or memory boards.

	This board provides two modes of operation: single character
	transfer mode, in which data is transferred one character at a
	time to or from the CPU, and block transfer mode, in which data
	is moved between the board and memory via DMA. In this mode, the
	board is a Multibus bus master and supports CBRQ.

	This board has four eight-position DIP switches, near the center
	of the board.

	DIP switch information:

	SW2     address
	  Switches 6 and 7 ON and all others OFF.

	SW3     address/default channel configuration
	  1,2   OFF (?)
	  3     ON; between this and SW2, address set to 0x0620.
	  4,5   OFF (?)
	  6     8/16-bit addressing, ON/OFF respectively. OFF by default.
	  7,8   one stop bit, both OFF

	SW4     default channel configuration
	  1,2   no parity, both OFF
	  3,4   eight bits, both ON
	  5-8   9600 baud: 5, 6, and 7 ON, 8 OFF

	SW5     interrupt level
	  Switch 5 ON, all others OFF, for interrupt level 4

xxx-xxxx        Systech VPC-2200 Versatec Printer/Plotter controller Multibus
	This board should not share a Multibus P2 section with Sun-2 CPU
	or memory boards.

	This board is a Multibus bus-mastering DMA board with CBRQ
	support. It supports two output channels: one channel supports
	the Versatec printer/plotter in either single-ended or
	long-lines differential mode, and the second supports any
	standard Centronics- or Dataproducts-compatible printer at rates
	up to 10,000 lines per minute. The two modes of the first
	channel are transparent to the software. The second channel has
	automatic printer selection which eliminates the need for
	setting switches for either Centronics- or Dataproducts-type
	printers.

	This board has a self-test feature for both channels that does
	not require any software support. The Versatec channel sends a
	132-character ASCII string in print mode and a 256-byte pattern
	in plot mode. The printer channel sends a 132-character ASCII
	string.

	DIP switch information:

	SW3     8/16-bit I/O, big/little-endian, 8/16-bit addressing, address
	  Switches 3, 4, 5, 6, and 7 should be ON, all others OFF.

	SW4     address
	  Switch 3 OFF, all others ON. Between this and SW3, the base
	  address is set to 0x0480.

	SW5     interrupt priority
	  Switch 3 ON, all others OFF, for interrupt priority 2.


    Floating-point and other system accelerators
    --------------------------------------------

370-1021        Sky Floating Point Processor Multibus
	This board must not share a Multibus P2 section with any Sun
	board which also uses the P2 bus.

	This board is an IEEE-compliant floating point coprocessor with
	a Weitek chip.

	This board has two jumper blocks, JP01 and JP02, in the lower
	left corner of the board (with the Multibus edge connector
	facing down and the component side facing you). These are
	14-position blocks; pin 1 is in the lower left, pin 7 the lower
	right, pin 8 the upper right, and pin 14 the upper left.

	Jumper information:

	JP01    address
	  As wired by Sky: 1-2 jumped
	  AS WIRED FOR USE IN A SUN: 1-11 jumped, address 0x2000

	JP02    interrupt level
	  As wired by Sky: 2-6, 4-5 jumped
	  AS WIRED FOR USE IN A SUN: 1-6, 3-6, 4-5 jumped, interrupt level 2

	Power requirements are +5V @ 4A.

501-1383        TAAC-1 application accelerator, POP board VME
	One board of a two-board set. Known to work in 3/160, 3/180,
	3/260, 3/280, 3/460, 3/480, 4/150, 4/260, 4/280, 4/330, 4/350,
	4/360, 4/370, 4/380, 4/470, 4/490.

501-1447        TAAC-1 application accelerator, DFB board VME
	One board of a two-board set. See 501-1383.


    Cardcage backplanes
    -------------------

501-1090        2/120 Multibus
	Nine-slot passive Multibus backplane. Slot 6 must be occupied by
	either a monochrome framebuffer board or a P2 terminator board.

    Other boards
    ------------

501-1054        Multibus-VME Adapter
	This board/frame accepts a normal Multibus card and connects it
	electrically to a VME bus. It has twelve DIP switch blocks, a
	PROM socket, and two jumpers, to allow it to be configured for
	any particular board. It was initially introduced after the
	transition to VME chassis in the Sun-2 era, and adapted Multibus
	boards such as the Xylogics 451 SMD disk controller were
	supported through the Sun-4 VME models.

	DIP switch blocks 1 through 4 determine access to Multibus I/O
	space from the VME bus. DIP switch blocks 5 through 8 determine
	access to Multibus memory from the VME bus. DIP switch blocks 9
	and 10 are unused. DIP switch block 11 is used with 20-bit-DMA
	Multibus boards. DIP switch block 12 and the PROM socket map
	Multibus interrupts to VME interrupts. The jumper block controls
	the multibus BCLK and CCLK.

	Multibus I/O space is mapped into the VME 16-bit address space.
	Multibus memory space is mapped into the VME 24-bit address
	space. Note that the address is the same on both buses (e.g. the
	Xylogics 450 appears at Multibus I/O address 0xEE40; therefore
	it will appear at VME address 0xEE40 as well).

	SW1     Multibus I/O addresses, low
	  1     unused
	  2-8   A7-A1 in reverse order (2 is A7, 3 is A6, 8 is A1, etc.)

	SW2     Multibus I/O block size, low
	  1     unused
	  2-8   A7-A1 in reverse order (2 is A7, 3 is A6, 8 is A1, etc.)

	SW3     Multibus I/O addresses, high
	  1-8   A15-A8 in reverse order (1 is A15, 2 is A14, 8 is A8,
		 etc.)

	SW4     Multibus I/O block size, high
	  1-8   A15-A8 in reverse order (1 is A15, 2 is A14, 8 is A8,
		 etc.)

	SW5     Multibus memory addresses, low
	  1-8   A15-A8 in reverse order (1 is A15, 2 is A14, 8 is A8,
		 etc.)

	SW6     Multibus memory block size, low
	  1-8   A15-A8 in reverse order (1 is A15, 2 is A14, 8 is A8,
		 etc.)

	SW7     Multibus memory addresses, high
	  1-8   A23-A16 in reverse order (1 is A23, 2 is A22, 8 is A16,
		 etc.)

	SW8     Multibus memory block size, high
	  1-8   A23-A16 in reverse order (1 is A23, 2 is A22, 8 is A16,
		 etc.)

	SW9     Unused

	SW10    Unused

	SW11    20-bit-DMA
	  1-4   A23-A20 in reverse order (1 is A23, 2 is A22, 4 is A20,.
		 etc.)
	  5-8   unused

	SW12    VME interrupt vector
	  1-8   Vector, LSB to MSB. Maps all Multibus interrupts to the
		 same VME vector. Use the PROM to map different Multibus
		 interrupts to different VME vectors. If the PROM is
		 installed, all switches in this block must be OFF.

	J1      BCLK and CCLK (9.8304MHz)
	  1-2   jumped to provide Multibus bus clock (BLCK) to the
		 board, unjumped to not. Most boards require this clock
		 signal.
	  3-4   jumped to provide Multibus constant clock (CCLK) to the
		 board, unjumped to not. Most boards require this clock
		 signal.

	To set the Multibus I/O switches (blocks 1 through 4):

	1) Find the block size for your board. If it is not a power of
	   two, round it up to the nearest power of two.

	2) Subtract one and throw away the lowest bit (A0 is not connected
	   to the switches -- the smallest possible block is two bytes).

	3) For each zero bit, turn the corresponding switch ON, and OFF
	   for each one bit, in SW2 and SW4. Remember that the address
	   lines are reversed in the switch positions!

	4) Find the base address for your board and bitwise-OR it with
	   the result from step 2, throwing away the lowest bit (A0 is
	   not connected to the switches).

	5) For each zero bit, turn the corresponding switch ON, and OFF
	   for each one bit, in SW1 and SW3. Remember that the address
	   lines are reversed in the switch positions!

	If you don't want to map any Multibus I/O space, set all
	switches in SW1 and SW3 to ON, and SW2 and SW4 to OFF.

	To set the Multibus memory switches (blocks 5 through 8):

	1) Find the block size for your board. If it is not a power of
	   two, round it up to the nearest power of two.

	2) Throw away the low byte (A0-A7 are not used -- the smallest
	   address increment is 256 bytes) and subtract one.

	3) For each zero bit, turn the corresponding switch ON, and OFF
	   for each one bit, in SW6 and SW8. Remember that the address
	   lines are reversed in the switch positions!

	4) Find the base address for your board and throw away the low
	   byte (A0-A7 are not used).

	5) Bitwise-OR it with the result from step 2.

	6) For each zero bit, turn the corresponding switch ON, and OFF
	   for each one bit, in SW5 and SW7. Remember that the address
	   lines are reversed in the switch positions!

	If you don't want to map any Multibus memory, set all
	switches in SW5 and SW7 to ON, and SW6 and SW8 to OFF.

	If the Multibus board is a 24-bit-DMA master, set all switches
	in SW11 to OFF. Otherwise, if it is a 20-bit-DMA master, use
	switches 1-4 in SW11 to supply the A20-A23 of the DMA address.
	As usual, 0 is ON and 1 is OFF. Note that "to access Sun main
	memory via DVMA, these bits should be set to zero."

	To use SW12 to set the VME interrupt vector, simply set the
	desired vector value in the switches. As usual, 0 is ON and 1 is
	OFF. To use the PROM to set VME interrupt vectors, program a
	32-by-8 bipolar PROM with the vectors for Multibus interrupt
	levels 7 through 1 in locations 0 through 6 respectively
	(reversed). Note that Multibus interrupt 0 cannot be mapped,
	"since the VMEbus has no level 0 interrupt."

	Example: the 370-1012 Xylogics 450 SMD disk controller uses no
	Multibus memory, has 8 bytes of Multibus I/O at address 0xEE40
	(for the first controller), is a 24-bit-DMA board, wants VME
	interrupt vector 0x48, and requires BCLK and CCLK. Hence:

			 1    2    3    4    5    6    7    8
		SW1     (un) ON   OFF  ON   ON   ON   OFF  OFF
		SW2     (un) ON   ON   ON   ON   ON   OFF  OFF
		SW3     OFF  OFF  OFF  ON   OFF  OFF  OFF  ON
		SW4               -- all ON --
		SW5               -- all ON --
		SW6               -- all OFF --
		SW7               -- all ON --
		SW8               -- all OFF --
		SW11              -- all OFF --
		SW12    ON   ON   ON   OFF  ON   ON   OFF  ON
		J1          -- pins 1-2, 3-4 jumped --

	Example: the 370-0502 (0167?) CPC Tapemaster 1/2" tape
	controller uses no Multibus memory, has two bytes of Multibus
	I/O at address 0x00A0, is a 20-bit-DMA board, wants VME
	interrupt vector 0x60, and requires BCLK and CCLK. Hence:

			 1    2    3    4    5    6    7    8
		SW1     (un) OFF  ON   OFF  ON   ON   ON   ON
		SW2     (un) ON   ON   ON   ON   ON   ON   ON
		SW3               -- all ON --
		SW4               -- all ON --
		SW5               -- all ON --
		SW6               -- all OFF --
		SW7               -- all ON --
		SW8               -- all OFF --
		SW11              -- all OFF --
		SW12    ON   ON   ON   ON   ON   OFF  OFF  ON
		J1          -- pins 1-2, 3-4 jumped --

501-1671        SPARCcenter 2000 system control board
	This board provides the hostid, Ethernet address, and possibly
	other stuff to the motherboards installed in a SPARCcenter 2000.

	It has a 'JTAG' connector at J0101 and a set of eight LEDs, half
	yellow and half green. From the yellow end:

		SVP     Service Processor Attached                      Y
		RST     System Reset                                    Y
		STP0    Stop Request from CARB0 ASIC                    Y
		STP1    Stop Request from CARB1 ASIC                    Y
		Vbb     -12VDC OK                                       G
		Vdd     +12VDC OK                                       G
		Vtt     +1.2VDC OK                                      G
		Vcc     +5VDC OK                                        G

	At location U0203 is the EEPROM, a 2K x 8-bit TMS29F816, which
	contains the hostid and Ethernet address. This part is not
	field-replaceable. If the contents of the system control board
	EEPROM are invalid, the values stored in the NVRAM on system
	board 0 are used instead, and the yellow LED on the keyswitch
	interface board is ON.

	The update-system-idprom ROM monitor command downloads the
	contents of the system board 0 NVRAM to the EEPROM on the system
	control board. At least version 2.11 is required to do this.

	To invalidate the contents of the system control board EEPROM,
	use the following sequence of commands:
		patch noop call update-system-idprom
		patch noop call update-system-idprom
		patch call noop update-system-idprom
		update-system-idprom

501-1979        SPARCserver 1000 system control board
	This board provides the hostid, Ethernet address, and possibly
	other stuff to the motherboards installed in a SPARCserver 1000.

	It has a variety of connectors, and a reset switch in one
	corner.

	J0101   'JTAG'

	J1001   '5 1/4" SCSI power'

	J1002   '3 1/2" SCSI power'

	J1003   '3 1/2" SCSI power'

	J1004   'Internal SCSI bus'

	At location U0201 is the EEPROM, a 2K x 8-bit TMS29F816, which
	contains the hostid and Ethernet address. This part is not
	field-replaceable. If the contents of the system control board
	EEPROM are invalid, the values stored in the NVRAM on system
	board 0 are used instead, and the yellow LED on the power supply
	is ON.

	The update-system-idprom ROM monitor command downloads the
	contents of the system board 0 NVRAM to the EEPROM on the system
	control board. At least version 2.11 is required to do this.

	To invalidate the contents of the system control board EEPROM,
	use the following sequence of commands:
		patch noop call update-system-idprom
		patch noop call update-system-idprom
		patch call noop update-system-idprom
		update-system-idprom

501-2335        SPARCcenter 2000 system control board
	See 501-1671.

501-2406        SPARCcenter 2000 system control board unprogrammed
	See 501-1671.

501-2412        SPARCserver 1000 system control board unprogrammed
	See 501-1979.

	      END OF PART IV OF THE SUN HARDWARE REFERENCE